Efficient compiler code generation for Deep Learning Snowflake co-processor

被引:0
|
作者
Chang, Andre Xian Ming [1 ]
Zaidy, Aliasger [1 ]
Culurciello, Eugenio [1 ]
机构
[1] FWDNXT, W Lafayette, IN 47906 USA
关键词
Deep learning; neural networks; co-processor; compiler;
D O I
10.1109/EMC2.2018.00013
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Deep Neural Networks (DNNs) are widely used in various applications including image classification, semantic segmentation and natural language processing. Various DNN models were developed to achieve high accuracy on different tasks. Efficiently mapping the workflow of those models onto custom accelerators requires a programmable hardware and a custom compiler. In this work, we use Snowflake, which is a programmable DNN targeted accelerator. We also present a compiler that correctly generated code for Snowflake. Our system were evaluated on various convolution layers present in AlexNet, ResNet and LightCNN. Snowflake with 256 processing units was implemented on Xilinx FPGA, and it achieved 70 frames/s for AlexNet without linear layers.
引用
收藏
页码:24 / 28
页数:5
相关论文
共 50 条
  • [1] Efficient A* Co-processor for Reconfigurable Gaming Devices
    Nery, Alexandre S.
    Sena, Alexandre C.
    2018 17TH BRAZILIAN SYMPOSIUM ON COMPUTER GAMES AND DIGITAL ENTERTAINMENT (SBGAMES 2018), 2018, : 97 - 106
  • [2] Automatic instruction generation for application specific co-processor
    Sang, ST
    Li, XM
    Ye, YZ
    2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2, 2005, : 854 - 857
  • [3] Efficient co-processor utilization in database query processing
    Bress, Sebastian
    Beier, Felix
    Rauhe, Hannes
    Sattler, Kai-Uwe
    Schallehn, Eike
    Saake, Gunter
    INFORMATION SYSTEMS, 2013, 38 (08) : 1084 - 1096
  • [4] THE EQUATIONAL SPECIFICATION OF EFFICIENT COMPILER CODE GENERATION
    HATCHER, PJ
    COMPUTER LANGUAGES, 1991, 16 (01): : 81 - 95
  • [5] Co-processor acceleration of an unmodified parallel solid mechanics code with FEASTGPU
    Goeddeke, Dominik
    Wobker, Hilmar
    Strzodka, Robert
    Mohd-Yusof, Jamaludin
    McCormick, Patrick
    Turek, Stefan
    INTERNATIONAL JOURNAL OF COMPUTATIONAL SCIENCE AND ENGINEERING, 2009, 4 (04) : 254 - 269
  • [6] CUBA: An Architecture for Efficient CPU/Co-processor Data Communication
    Gelado, Isaac
    Kelm, John H.
    Ryoo, Shane
    Lurnetta, Steven S.
    Navarro, Nacho
    Hwu, Wen-mei W.
    ICS'08: PROCEEDINGS OF THE 2008 ACM INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, 2008, : 299 - +
  • [7] A co-processor design of an energy efficient reconfigurable accelerator CMA
    Izawa, Mai
    Ozaki, Nobuaki
    Koizumi, Yusuke
    Uno, Rie
    Amano, Hideharu
    2013 FIRST INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING (CANDAR), 2013, : 148 - 154
  • [8] A watermarking co-processor for new generation graphics processing units
    Mohanty, Saraju P.
    Pati, Nishikanta
    Kougianos, Elias
    ICCE: 2007 DIGEST OF TECHNICAL PAPERS INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS, 2007, : 303 - +
  • [9] New decompilation techniques for binary-level co-processor generation
    Stitt, G
    Vahid, F
    ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2005, : 547 - 554
  • [10] A universal and efficient AES co-processor for field programmable logic arrays
    Pramstaller, N
    Wolkerstorfer, J
    FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2004, 3203 : 565 - 574