Photon-Detection Timing-Jitter Model in Verilog-A

被引:0
|
作者
Lopez-Martinez, Juan Manuel [1 ]
Carmona-Galan, Ricardo [1 ]
Rodriguez-Vazquez, Angel [1 ]
机构
[1] Univ Seville, Inst Microelect Sevilla CNM, CSIC, Seville, Spain
基金
欧盟地平线“2020”;
关键词
Photon detection; timing jitter; Verilog-A; single-photon avalanche diode (SPAD); device simulation;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Single-photon avalanche diodes can be employed to register the arrival of an individual photon. They are biased beyond breakdown voltage, and thus the electron-hole pairs generated by any incident photon is accelerated by the strong electric field triggering an avalanche current. In recent years, there have been attempts to model its characteristics in Verilog-A HDL. However, none of them have modelled its photon-detection timing jitter. This paper explains the mechanism of avalanche triggering and proposes a first approach to model it in Verilog-A. Comparison with experimental data and data reported in literature validates the model.
引用
收藏
页数:5
相关论文
共 50 条
  • [31] VAMPyRE: The Verilog-A Model Python']Pythonic Rule Enforcer
    Coram, Geoffrey J.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2024, 71 (01) : 54 - 56
  • [32] Verilog-A Based Compact Model of the Silicon Hall Element
    Dao Dinh Ha
    Stempitsky, Viktor
    Tran Tuan Trung
    PROCEEDINGS OF 2017 7TH INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS, DESIGN, AND VERIFICATION (ICDV), 2017, : 41 - 45
  • [33] Verilog-A implementation of ICS model for PD SOI devices
    Contreras, E.
    Alvarado, J.
    Cerdeira, A.
    2007 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING, 2007, : 36 - 39
  • [34] An efficient Verilog-A memristor model implementation: simulation and application
    Rziga, Faten Ouaja
    Mbarek, Khaoula
    Ghedira, Sami
    Besbes, Kamel
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2019, 18 (03) : 1055 - 1064
  • [35] Verilog-A model of ferroelectric memristors dedicated to neuromorphic design
    Meyer, Charly
    Chanthbouala, Andre
    Boyn, Soren
    Tomas, Jean
    Garcia, Vincent
    Bibes, Manuel
    Fusil, Stephane
    Grollier, Julie
    Saighi, Sylvain
    2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2018, : 557 - 560
  • [36] Calculation and analysis of timing-jitter in dispersion-managed soliton system
    College of Communication, Hangzhou Dianzi University, Hangzhou 310018, China
    不详
    Zhongguo Jiguang, 2006, 5 (607-612):
  • [37] Test of the VCSEL Driver Based on Verilog-A VCSEL Model
    Hwang, Jeongho
    Jeong, Gyu-Seob
    Bae, Woorham
    Kim, Yoonsoo
    Kim, Gyungock
    Jeong, Deog-Kyoon
    2015 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2015, : 81 - 82
  • [38] An accurate Verilog-A based model for MEMS capacitive accelerometer
    Vajargah, Maryam Karimi
    Shamsi, Hossein
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2023, 164
  • [39] Behavioral Model of a VCO Varying its KVCO with Verilog-A
    Jimenez-Dominguez, Emigdio
    Gonzalez-Diaz, Victor R.
    Rodriguez-Dominguez, Ana M.
    PROCEEDINGS OF THE 2016 13TH INTERNATIONAL CONFERENCE ON POWER ELECTRONICS (CIEP), 2016, : 70 - 74
  • [40] Characterization and Model Validation of Triboelectric Nanogenerators using Verilog-A
    Zaky, Ahmed
    Shehata, Mohamed
    Ismail, Yehea
    Mostafa, Hassan
    2017 IEEE 60TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2017, : 1536 - 1539