Measuring depletion-layer capacitance to analyze a decrease in breakdown voltage of 4H-SiC diodes

被引：5

作者：

Matsushima, H. ^{[1
]}

Okino, H. ^{[1
]}

Mochizuki, K. ^{[1
]}

Yamada, R. ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, 1-280 Higashi Koigakubo Cho, Kokubunji, Tokyo 1858601, Japan

来源：

JOURNAL OF APPLIED PHYSICS | 2016年 / 119卷 / 15期

关键词：

JUNCTION TERMINATION EXTENSION; EDGE TERMINATION; SIC DEVICES; DESIGN; JTE;

D O I：

10.1063/1.4946889

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

A decrease in breakdown voltage (V-BD) in the termination area of 4H-SiC PN diodes after 64 h reverse-bias stressing was analyzed. To analyze the V-BD decrease, a novel analysis method based on the results of measuring depletion-layer capacitance of the PN diodes was proposed. The measurement results indicate that the positive-charge density (Q(TM)) at the SiO2/SiC interface of the termination area increased after the reverse-bias stressing. Besides, in the case of Q(TM) of 10(12) cm(-2) at the SiO2/SiC interface, the decrease in the measured capacitance showed the same tendency as the decrease in the simulated capacitance. By comparing the measured full depletion voltage and simulated full depletion voltage, the amount of Q(TM) was estimated. It is thus concluded that the proposed method for measuring the depletion-layer capacitance is effective for analyzing the Q(TM) change in the termination area. Published by AIP Publishing.

引用

页数：6

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