High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture

被引：73

作者：

Olsen, SH ^{[1
]}

O'Neill, AG

Driscoll, LS

Kwa, KSK

Chattopadhyay, S

Waite, AM

Tang, YT

Evans, AGR

Norris, DJ

Cullis, AG

Paul, DJ

Robbins, DJ

机构：

[1] Univ Newcastle, Sch Elect Elect & Comp Engn, Newcastle Upon Tyne NE1 7RU, Tyne & Wear, England

[2] Univ Southampton, Dept Elect & Comp Sci, Southampton SO17 1BJ, Hants, England

[3] Univ Sheffield, Dept Elect & Elect Engn, Sheffield S1 3JD, S Yorkshire, England

[4] QinetiQ, Malvern WR14 3PS, Worcs, England

[5] Univ Cambridge, Cavendish Lab, Cambridge CB3 0HE, England

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2003年 / 50卷 / 09期

基金：

英国工程与自然科学研究理事会;

关键词：

CMOS; drain-current enhancement; nMOSFETs; self-heating; SiGe; strained silicon; thermal budget; transconductance enhancement; virtual substrate;

D O I：

10.1109/TED.2003.815603

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Performance enhancements of up to 170% in drain current, maximum transconductance, and field-effect mobility are presented for nMOSFETs fabricated with strained-Si channels compared with identically processed bulk Si MOSFETs. A novel layer structure comprising Si/Si0.7Ge0.3 on an Si0.85Ge0.15 virtual substrate (VS) offers improved performance advantages and a strain-compensated structure. A high thermal budget process produces devices having excellent on/off-state drain-current characteristics, transconductance, and subthreshold characteristics. The virtual substrate does not require chemical-mechanical polishing and the same performance enhancement is achieved with and without a titanium salicide process.

引用

页码：1961 / 1969

页数：9

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