共 46 条
- [41] Gate and drain SEU sensitivity of sub-20-nm FinFET- and Junctionless FinFET-based 6T-SRAM circuits by 3D TCAD simulation Journal of Computational Electronics, 2017, 16 : 74 - 82
- [44] 3D-TCAD Simulation Study of the Novel T-FinFET Structure for Sub-14nm Metal-Oxide-Semiconductor Field-Effect Transistor 2015 SILICON NANOELECTRONICS WORKSHOP (SNW), 2015,