Priority Encoder using reversible logic gates in QCA

被引：0

作者：

Sen, Riya ^{[1
]}

Das, Sandip ^{[1
]}

Mazumder, Gitika Guha ^{[1
]}

Yadav, Priyanka ^{[1
]}

Neogy, Ballary ^{[1
]}

Pandey, Rohit ^{[1
]}

Sharma, Shalu ^{[1
]}

Jana, Biswajit ^{[1
]}

机构：

[1] Univ Engn & Management, Elect & Commun Engn, Jaipur, Rajasthan, India

来源：

2017 8TH IEEE ANNUAL INFORMATION TECHNOLOGY, ELECTRONICS AND MOBILE COMMUNICATION CONFERENCE (IEMCON) | 2017年

关键词：

Reversible logic; Fredkin gate; URLG; QCA; priority encoder; DESIGN;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Reversible logic gate has gained importance in recent times due to its low power dissipation and less information loss. QCA on the other hand has low power consumption and has applications in reversible logic. In this paper, a 4x2 priority encoder is proposed which is based on reversible logic implemented in QCA. Firstly, this paper discusses about QCA layout design of Fredkin gate and Universal Reversible Logic Gate (URLG). Secondly, this paper uses reversible logic gate (both Fredkin and URLG) to design a 4x2 priority encoder in QCA.

引用

页码：319 / 323

页数：5

共 50 条

[41] Synthesis of multipurpose reversible logic gates
Kerntopf, P
EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS: ARCHITECTURES, METHODS AND TOOLS, 2002, : 259 - 266
[42] Reversible Logic Gates on Physarum Polycephalum
Schumann, Andrew
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE OF NUMERICAL ANALYSIS AND APPLIED MATHEMATICS 2014 (ICNAAM-2014), 2015, 1648
[43] Algebraic Characterization of Reversible Logic Gates
Xiaoyu Song
Guowu Yang
Marek Perkowski
Yuke Wang
Theory of Computing Systems, 2006, 39 : 311 - 319
[44] Algebraic characterization of reversible logic gates
Song, XY
Yang, GW
Perkowski, M
Wang, YK
THEORY OF COMPUTING SYSTEMS, 2006, 39 (02) : 311 - 319
[45] Reversible Logic Gates Based on Single Spin Logic
Gope, J.
Mondal, S.
Kundu, M.
Chowdhury, S.
Bhadra, S.
ADVANCES IN OPTICAL SCIENCE AND ENGINEERING, 2017, 194 : 613 - 619
[46] QCA with reversible arithmetic and logic unit for nanoelectronics applications
Latha, Gade Mary Swarna
Rooban, S.
INTERNATIONAL JOURNAL OF INTELLIGENT COMPUTING AND CYBERNETICS, 2023, 16 (01) : 139 - 157
[47] Implementation of sequential circuit using feynman and fredkin reversible logic gates
Krishna, K. Bala
Ramesh, A. Puma
INTERNATIONAL CONFERENCE ON COMPUTER VISION AND MACHINE LEARNING, 2019, 1228
[48] Design of reversible shift register using reduced number of logic gates
Maity H.
Banerjee S.
Biswas A.
Pal A.
Bhattacharjee A.K.
Micro and Nanosystems, 2020, 12 (01) : 33 - 37
[49] Design of the quantum encoder and decoder using QCA
Lü, H. (lvhongjun1958@sina.com), 1600, Chinese Optical Society (32):
[50] Concurrently Testable FPGA Design for Molecular QCA Using Conservative Reversible Logic Gate
Thapliyal, Himanshu
Ranganathan, Nagarajan
ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 1815 - 1818

← 1 2 3 4 5 →