A single-chip HDTV video decoder design

被引：2

作者：

Sita, R ^{[1
]}

Brosz, E ^{[1
]}

Meyer, R ^{[1
]}

Phillips, L ^{[1
]}

Ryan, RT ^{[1
]}

机构：

[1] Panason AVC Amer Labs Inc, Burlington, NJ USA

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1998年 / 44卷 / 03期

关键词：

D O I：

10.1109/30.713159

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Development has been completed for a single-chip MPEG2 Main Profile @ High-Level Video Decoder that decodes and displays all 18 ATSC digital video formats, including HDTV. Additionally, it can "downconvert" HDTV inputs to SDTV resolution and incorporates programmable filters for display output reformatting. By using Rambus DRAM technology, adequate memory performance was achieved for a single-chip implementation. Applications include digital TV receivers, set-top boxes and computers.

引用

页码：519 / 526

页数：8

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