Architecture template and design flow to support application parallelism on reconfigurable platforms

被引：0

作者：

Sawitzki, S

Spallek, RG

机构：

[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands

[2] Dresden Univ Technol, Dept Comp Sci, Inst Comp Engn, D-01062 Dresden, Germany

来源：

FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS | 2003年 / 2778卷

关键词：

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper introduces the ReSArT (Reconfigurable Scalable Architecture Template). Based on a suitable design space model, ReSArT is parametrizable, scalable, and able to support all levels of parallelism. To derive architecture instances from the template, a design environment called DEflnE (Design Environment for ReSArT Instance Generation) is used, which integrates some existing academic and industrial tools with ReSArT-specific components, developed as a part of this work. Different architecture instances were tested with a set of 10 benchmark applications as a proof of concept, achieving a maximum degree of parallelism of 30 and an average degree of parallelism of nearly 20 16-bit operations per cycle.

引用

页码：1119 / 1122

页数：4

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