To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.
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Seoul Natl Univ, Dept Elect Engn, Seoul 151, South KoreaSeoul Natl Univ, Dept Elect Engn, Seoul 151, South Korea
Han, Jiho
Jeong, Deog-Kyoon
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机构:
Seoul Natl Univ, Dept Elect Engn, Seoul 151, South Korea
Seoul Natl Univ, ISRC, Seoul 151, South KoreaSeoul Natl Univ, Dept Elect Engn, Seoul 151, South Korea