Steady-state analysis and design of phase-controlled class-D ZVS inverter

被引:0
|
作者
Osato, Tatsuki [1 ]
Wei, Xiuqin [2 ]
Asiya [1 ]
Nguyen, Kien [1 ]
Sekiya, Hiroo [1 ]
机构
[1] Chiba Univ, Grad Sch Sci & Engn, Inage Ku, 1-33 Yayoi Cho, Chiba 2638522, Japan
[2] Chiba Inst Technol Univ, Dept Elect Engn, 2-17-1 Tsudanuma, Narashino, Chiba 2750016, Japan
来源
关键词
zero-voltage switching; class-D inverter; anti-parallel diode; phase-controlled; harmonic component; SERIES RESONANT INVERTERS; CONVERTER;
D O I
10.1587/nolta.11.189
中图分类号
O1 [数学];
学科分类号
0701 ; 070101 ;
摘要
This paper proposes an analysis and design method of the phase-controlled class-D Zero-Voltage Switching (ZVS) inverter. To derive the ZVS region diagram, a steady-state waveform of the phase-controlled class-D inverter is analytically derived. This analysis introduces an expression of an anti-parallel diode behavior and multiple-harmonic analysis. By developing a ZVS region diagram at the fixed phase shift and drawing power contour lines over the region diagram, a parameter region, in which sufficient power can be obtained with achieving the ZVS, are also determined. The analysis and design method of this paper were verified through circuit experiments and by collating the quantitative values obtained from the experiment and analysis.
引用
收藏
页码:189 / 205
页数:17
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