A 3.6-mW 6-GHz current-reuse VCO-buffer with improved load drivability in 65-nm CMOS

被引：4

作者：

Amin, Tawfiq ^{[1
,2
]}

Mak, Pui-In ^{[1
,2
]}

Martins, Rui P. ^{[1
,2
,3
]}

机构：

[1] Univ Macau, VLSI, State Key Lab Analog & Mixed Signal, Macau, Peoples R China

[2] Univ Macau, FST, ECE, Macau, Peoples R China

[3] Univ Tecn Lisboa, Inst Super Tecn, Lisbon, Portugal

来源：

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | 2015年 / 43卷 / 01期

关键词：

D O I：

10.1002/cta.1933

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new current-reuse voltage-controlled oscillator (VCO)-buffer with enhanced load drivability is proposed. It incorporates a PMOS-based source follower stacked atop a NMOS-based LC VCO to share the bias current, while preventing the voltage stress at any oscillation node from exceeding the 1.2-V technology voltage limit. Also, ac-coupling networks are avoided between the VCO and buffer, improving the Q of the LC tank while minimizing parasitics. With internal buffering, the VCO can directly drive up a 50-Omega load for testing, or to withstand a large capacitive load in on-chip local oscillator distribution, particularly suitable for multi-band MIMO WLAN radios. The fabricated VCO-buffer in 65-nm CMOS measures 13.8% tuning range from 5.64 to 6.4 GHz, consumes 3.6 mW at 1.2 V and exhibits -108.84 dBc/Hz phase noise at 1-MHz offset. Copyright (c) 2013 John Wiley & Sons, Ltd.

引用

页码：133 / 138

页数：6

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