InP-based HFET's and RTD's for high speed digital circuitry

被引：1

作者：

Prost, W ^{[1
]}

Auer, U ^{[1
]}

Pacha, C ^{[1
]}

Brennemann, A ^{[1
]}

Janssen, G ^{[1
]}

Bertenburg, RM ^{[1
]}

Brockerhoff, W ^{[1
]}

Bushehri, E ^{[1
]}

Goser, KF ^{[1
]}

Tegude, FJ ^{[1
]}

机构：

[1] Univ Duisburg Gesamthsch, Dept Solid State Elect, D-4100 Duisburg, Germany

来源：

1998 URSI SYMPOSIUM ON SIGNALS, SYSTEMS, AND ELECTR ONICS | 1998年

关键词：

D O I：

10.1109/ISSSE.1998.738034

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An InP-based HFET technology for monolithically integrated high speed digital circuits is described. A novel logic gate configuration is presented based on depletion mode HFET's using a non-linear negative feedback for high speed operation. A possible implementation of enhancement mode transistors and the promising combination with a low-peak voltage RTD is also presented. A preliminary investigation on manufacturability of RTD is given. We report on the realisation of RTD/E-HFET on InP as a building block for digital circuits and its applicability to a novel circuit architecture (multiple input threshold logic).

引用

页码：45 / 49

页数：5

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