A 28-GHz Current-Mode Inverse-Outphasing Power Amplifier in 65-nm CMOS

被引：0

作者：

Li, Liangfeng ^{[1
]}

Ni, Dongliang ^{[1
]}

Chen, Jiazheng ^{[1
]}

Huang, Jiwei ^{[1
]}

机构：

[1] Fuzhou Univ, Dept Coll Phys & Informat Engn, Fuzhou, Peoples R China

来源：

2021 THE 6TH INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS AND MICROSYSTEMS (ICICM 2021) | 2021年

关键词：

CMOS; outphasing PA; current-mode combiner; millimeter wave (mm-wave) integrated circuits;

D O I：

10.1109/ICICM54364.2021.9660333

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a 28-GHz high efficiency outphasing power amplifier (PA) with Chireix compensation in 65-nm Silicon-On-Insulator (SOI) CMOS technology is proposed. To improve the power-back-off (PBO) efficiency, the PA uses a current-mode inverse outphasing architecture, which supports compatibility with current-mode PAs, highly efficient active load modulation. Meanwhile, the neutralization capacitor and source degeneration inductor technology is employed to tradeoff linearity and high efficiency requirements. At 28GHz with a supply voltage of 2.5/1.2V, the complete outphasing PA achieves a simulated saturated output power of 23.8dBm with 45.1% power-added efficiency (PAE) and 6dB back-off PAE of 25.2%, 1-dB compression output power of 21.8dBm, and gain of 16.6dB. The simulation results also show that the PA is unconditionally stable in the whole working frequency band. The power amplifier has a layout size of 1.02 mm(2) and a core area of 0.46 mm(2).

引用

页码：268 / 271

页数：4

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