Implementation of Sobel Edge Detection on FPGA based on OpenCL

被引：0

作者：

You, Baoshan ^{[1
]}

Sheng, Weihua ^{[2
]}

Ma, Hongwei ^{[1
]}

Gu, Ye ^{[3
]}

Qin, Yinglin ^{[1
]}

机构：

[1] Shandong Jianzhu Univ, Sch Comp Sci & Technol, Jinan 250101, Shandong, Peoples R China

[2] Oklahoma State Univ, Sch Elect & Comp Engn, Stillwater, OK 74078 USA

[3] Shenzhen Acad Robot, Shenzhen 518057, Peoples R China

来源：

2017 IEEE 7TH ANNUAL INTERNATIONAL CONFERENCE ON CYBER TECHNOLOGY IN AUTOMATION, CONTROL, AND INTELLIGENT SYSTEMS (CYBER) | 2017年

基金：

中国国家自然科学基金;

关键词：

OpenCL; Sobel; FPGA; Embedded System;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, Sobel edge detection is implemented on an FPGA using a DE1-SoC development board front TERASIC. OpenCL as a new scheme is used for implementation. The development process and implementation details are described The results show that OpenCL is an efficient method for FPGA development compared to traditional Hardware Description Language (HDL). We apply the OpenCL programming to FPGA-based Sobel edge detection. which gains a significant performance increase compared to that of software methods. The work of this paper can be extended to more complicated algorithms.

引用

页码：753 / 758

页数：6

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