Yield and reliability effects of interlevel dielectric plasma enhanced deposition induced charging damage

被引：5

作者：

Scarpa, A ^{[1
]}

van Marwijk, L ^{[1
]}

Peters, W ^{[1
]}

Boter, D ^{[1
]}

Kuper, FG ^{[1
]}

机构：

[1] Philips Semicond, MOS4YOU FD0S07, NL-6534 AE Nijmegen, Netherlands

来源：

2001 6TH INTERNATIONAL SYMPOSIUM ON PLASMA- AND PROCESS-INDUCED DAMAGE | 2001年

关键词：

D O I：

10.1109/PPID.2001.929975

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The gate oxide damage induced by plasma enhanced CVD of ILD has been investigated. It was observed that this kind of plasma damage induces oxide soft breakdown, rather than hard breakdown, due to the high resistance of the deposited film, This fact has important implications in the IC yield and reliability,. In fact, soft breakdowns hardly cause IC yield loss during the e-sort. Nevertheless, the gate oxide reliability can be seriously affected by the plasma induced damage and the IC intrinsic lifetime severely reduced.

引用

页码：44 / 47

页数：4

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