3-D stacked CMOS inverters using Pt/HfO2 on Si substrate for vertical integrated CMOS applications

Three-dimensionally stacked CMOS inverters were fabricated by using the poly-Si thin film transistor (TFT) with hafnium-oxide (HfO2) gate dielectric and Pt gate electrode. For fabrication of 3-D stacked CMOS inverters consist of poly-Si NMOS/interlayer dielectric film (ILD)/poly-Si PMOS, a reduced process temperature is necessary to avoid the degradation of NMOS at lower poly-Si layer fabricated prior to PMOS at upper poly-Si layer. The high quality of laser crystallized poly-Si film was obtained with smooth surface and excellent crystallinity. The 3-D stacked CMOS inverters fabricated by stacking the poly-Si NMOS TFT and PMOS TFT showed good output characteristics, DC voltage transfer characteristics, transient characteristics and voltage gain for applications of the vertical integrated CMOS circuits. (C) 2007 Elsevier B.V. All rights reserved.