A low-phase-noise frequency synthesizer for single-chip CMOS UHF RFID reader

被引:0
|
作者
Zhang, Runxi [1 ]
Chen, Yihao [1 ]
Shi, Chunqi [1 ]
Lai, Zongshen [1 ]
机构
[1] E China Normal Univ, IMCS, Shanghai 200062, Peoples R China
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel fractional-N frequency synthesizer which is based on delta sigma modulator (DSM) and specialized for single-chip ultra-high frequency radio-frequency identification (UHF RFID) reader is proposed in this paper. The fractional-N synthesizer is implemented in 0.18 mu m CMOS process. The phase noise of the fractional-N synthesizer is approximately -109 dBc/Hz and -129 dBc/Hz at 200 kHz and 1 MHz offset from 900 MHz operating frequency while drawing 9.6 mA from 1.8 V power supply. The synthesizer is evaluated by implementing it in a direct conversion RF front-end. The front-end features a noise figure of 3.5 dB and an input-referred third-order intercept point of 5 dBm.
引用
收藏
页码:1477 / 1480
页数:4
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