Design of low cross-talk image transceiver device and controller circuitry

An Image Transceiver Device (ITD) is under development at the Holon Institute and Ben Gurion University. The device, capable of performing imaging and display functions in a single chip, is based on a combination of CMOS and LCOS technologies. Its main applications include Smart Goggle and Vision enhancement. In this paper we report on studies to reduce the cross talk in the ITD chip. These studies which cover an n-well, a twin-well and a deep p-well structure, indicate that the deep p-well structure is the preferred approach resulting in the lowest cross-talk level of all 3 candidates. The second area studied was a novel design of an FPGA chip required in order to control the unique Imager-Display circuitry of the ITD. Details of the controller circuitry and its functions are presented.