HW-SW co-synthesis: The present and the future

被引：0
|
作者：
Parameswaran, S [1 ]
机构：
[1] Univ Queensland, Dept Comp Sci & Elect Engn, St Lucia, Qld 4072, Australia
来源：
PROCEEDINGS OF THE ASP-DAC '98 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1998 WITH EDA TECHNO FAIR '98 | 1998年
关键词：
D O I：
10.1109/ASPDAC.1998.669392
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
As we move towards several million transistors per chip it is desirable to move to higher levels of abstraction for the purposes of automated design of systems. Increasing performance of microprocessors in the marketplace is moving the balance between software and hardware. In this environment, it is necessary to adapt our tools to create systems, which encompass these fast microprocessors rather than compete with them. It is important to adapt other peripheral components such as sensors and RF circuits into our design methodology.
引用
收藏
页码：19 / 22
页数：4
相关论文
共 50 条
  • [31] Programming models and HW-SW interfaces abstraction for multi-processor SoC
    Jerraya, Ahmed A.
    Bouchhima, Aimen
    Petrot, Frederic
    43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 280 - +
  • [32] Improving embedded system design by means of HW-SW compilation on reconfigurable coprocessors
    Moya, JM
    Rincón, F
    Moya, F
    López, JC
    ISSS'02: 15TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS, 2002, : 255 - 260
  • [33] Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators
    Jeong, Geonhwa
    Kestor, Gokcen
    Chatarasi, Prasanth
    Parashar, Angshuman
    Tsai, Po-An
    Rajamanickam, Sivasankaran
    Gioiosa, Roberto
    Krishna, Tushar
    30TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT 2021), 2021, : 30 - 44
  • [34] HW-SW design flow of a nano-satellite using UML and CodeSimulink co-design environment
    Tranchero, Maurizio
    CIRCUITS AND SYSTEMS FOR SIGNAL PROCESSING , INFORMATION AND COMMUNICATION TECHNOLOGIES, AND POWER SOURCES AND SYSTEMS, VOL 1 AND 2, PROCEEDINGS, 2006, : 85 - 88
  • [35] HW-SW Integration for Energy-Efficient/Variability-Aware Computing
    Ayad, Gasser
    Acquaviva, Andrea
    Macii, Enrico
    Sahbi, Brahim
    Lemaire, Romain
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 607 - 611
  • [36] HW-SW Interface Design and Implementation for Error Logging and Reporting for RAS Improvement
    Canino, Nicasio
    Di Matteo, Stefano
    Rossi, Daniele
    Saponara, Sergio
    IEEE ACCESS, 2024, 12 : 60081 - 60094
  • [37] Integrating physical constraints in HW-SW partitioning for architectures with partial dynamic reconfiguration
    Banerjee, Sudarshan
    Bozorgzadeh, Elaheh
    Dutt, Nikil D.
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2006, 14 (11) : 1189 - 1202
  • [38] Parallel programming of multi-processor SoC:: A HW-SW interface perspective
    Kriaa, Lobna
    Bouchhima, Aimen
    Gligor, Marius
    Fouillart, Anne-Marie
    Petrot, Frederic
    Jerraya, Ahmed-Amine
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 2008, 36 (01) : 68 - 92
  • [39] Towards a Schedulable Fault Tolerant HW-SW Mapping for Real Time Systems
    Sadi, Muhammad Sheikh
    Shuvo, Md. Noor Alam
    Rahman, Md. Anisur
    2012 15TH INTERNATIONAL CONFERENCE ON COMPUTER AND INFORMATION TECHNOLOGY (ICCIT), 2012, : 563 - 568
  • [40] High-throughput HW-SW implementation for MV-HEVC decoder
    Liu, Wei
    Li, Wei
    Un, Park Sang
    Cho, Yong Beom
    2018 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2018, : 226 - 228
12345