REDUCING THE STANDBY POWER CONSUMPTION OF PERSONAL COMPUTERS

被引：0
|
作者：
Hsu, Huang-Te [1 ]
Bai, Ying-Wen [2 ]
Chao, Shih-Kuan [2 ]
机构：
[1] Fu Jen Catholic Univ, Grad Inst Appl Sci & Engn, Taipei, Taiwan
[2] Fu Jen Catholic Univ, Dept Elect Engn, Taipei, Taiwan
来源：
2011 24TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE) | 2011年
关键词：
Personal Computer; Power Saving; Power Consumption; Standby Power;
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Most low-power PC designs were either focused on power efficiency improvement or software power management in the working states until now. Our research aims to reduce the standby power in the off state. To reduce it by redesigning the power circuit, we cut off the power supply for the unnecessary chips, except that power which is necessary for the chip needed to wake up the system. We also turn off the power supply of the power controller chip which is used to control the system power status, and we use another low-power chip instead. We redesign the power sequence of the system, to maintain the system power state while the system power state controller is turned off. Finally, we use a low-power chip to control the power supply separately by means of the remote wake up devices.
引用
收藏
页码：493 / 498
页数：6
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