A High-speed Data Acquisition and Preprocessing Method for Wirelessly Supervising Train Braking System

In a real-time control system with large amounts of data, a high-speed and effiient collection and processing is the prerequisite for smooth operation. The braking system of train is a typical example. During the braking process of the train, it is necessary to deal with the real-time data from air brake valve, auxiliary air cylinder, air cylinder, brake shoe and relay valve transmitted by different carriages. Therefore, this paper designs a set of high-speed data acquisition and processing system based on FPGA for wirelessly supervising train-braking system. The parallel transmission between FPGA and ADC will greatly improve the speed of data collection. The data processing module is a custom fuzzy processing module, which reduces the negative impact from the imprecise braking-model and the model change. The wireless communication and memory module use two SRAM working alternately to improve communication efficiency. According to the characteristics of the system, this design programming with modular design method based on verilog HDL and we use the finite state machine as the control module. Finally, we performed RTL level function simulation and timing analysis.