Deterministic phase jitter in multi-phase CMOS ring oscillators due to transistor mismatches

被引：0

作者：

Koneru, S ^{[1
]}

Chen, Y ^{[1
]}

Geiger, R ^{[1
]}

Lee, E ^{[1
]}

机构：

[1] Iowa State Univ, Dept Elect & Comp Engn, Ames, IA 50011 USA

来源：

ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6 | 1998年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A comparison is made of the effects of random parameter variations on the periodic mismatches in three different high-speed ring oscillators generating multi-phase clock signals. These variations in the phase-to-phase periods manifest themselves in the form of jitter which is deterministic in nature. Simulations have also been carried out to demonstrate the improvement in the jitter performance of these oscillators with device scaling.

引用

页码：213 / 216

页数：4

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