Functional verification of the IBM zSeries eServer z900 system

被引：1
|
作者：
Walter, J [1 ]
机构：
[1] IBM Entwicklung GmbH, Boblingen, Germany
来源：
ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS | 2002年
关键词：
D O I：
10.1109/ICCD.2002.1106741
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents an overview on how the zSeries eServer z900 system has been functionally verified. It describes the hierarchical structure of verification, starting with designer simulation, unit-simulation, chip-simulation up to system simulation. For each step, the tools, methods and goals of verification are described. It also presents a description of the IT environment used at the different levels of verification, especially of dedicated simulation hardware like accelerator and emulator machines used for system simulation and hardware/software co-verification.
引用
收藏
页码：17 / 21
页数：5
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