A 5-GHz CMOS wireless LAN receiver front end

被引：196
|
作者：
Samavati, H [1 ]
Rategh, HR [1 ]
Lee, TH [1 ]
机构：
[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2000年 / 35卷 / 05期
关键词：
automatic tuning; CMOS analog integrated circuits; high-frequency filters; HIPERLAN; image-reject circuits; low-noise amplifier (LNA); notch filter; receiver front end;
D O I：
10.1109/4.841505
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a 12.4-mW front end for a 5-GHz wireless LAN receiver fabricated in a 0.24-mu m CMOS technology. It consists of a low-noise amplifier (LNA), mixers, and an automatically tuned third-order filter controlled by a low-power phase-locked loop. The filter attenuates the image signal by an additional 12 dB beyond what can be achieved by an image-reject architecture. The filter also reduces the noise contribution of the cascode devices in the LNA core. The LNA/filter combination has a noise figure of 4.8 db, and the overall noise figure of the signal path is 5.2 dB. The overall IIP3 is -2 dBm.
引用
收藏
页码：765 / 772
页数：8
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