CMOS blocks for on-chip RF test

被引:5
|
作者
Ramzan, Rashad [1 ]
Dabrowski, Jerzy [1 ]
机构
[1] Linkoping Univ, Dept Elect Engn, SE-58183 Linkoping, Sweden
关键词
RF test; loopback test; DfT; radio transceivers; RF-CMOS design; RF frontend;
D O I
10.1007/s10470-006-9615-2
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35 mu m CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.
引用
收藏
页码:151 / 160
页数:10
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