A Compact 14 GS/s 8-bit Switched-Capacitor DAC in 16 nm FinFET CMOS

被引：13

作者：

Caragiulo, Pietro ^{[1
]}

Mattia, Oscar Elisio ^{[1
]}

Arbabian, Amin ^{[1
]}

Murmann, Boris ^{[1
]}

机构：

[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA

来源：

2020 IEEE SYMPOSIUM ON VLSI CIRCUITS | 2020年

关键词：

digital-to-analog converter; transmitter; switched-capacitor circuits;

D O I：

10.1109/vlsicircuits18222.2020.9162776

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a compact DAC for digital-intensive transmitter architectures. To minimize area and to leverage the strengths of FinFET CMOS, the implementation departs from the traditional current steering approach and consists mainly of inverters and sub-femtofarad switched capacitors. The 14 GS/s 8-bit design occupies only 0.011 mm(2) and supports up to 0.32 V-pp signal swing across its differential 100 Omega load. It achieves IM3 < -45.3 dBc across the first Nyquist zone while consuming 50 mW from a single 0.8 V supply.

引用

页数：2

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