Modelling of a 4-18GHz 6W flip-chip integrated power amplifier based on GaNHEMTs technology

This paper reports on the design of a cascode GaN HEMT distributed power amplifier demonstrating significant improvement of the best power performances reported to date. The active device is a 8x50 mu m AIGaN/GaN HEMT grown on siSiC. The distributed power amplifier integrates 4 cascode cells capacitively coupled to the gate line for power optimization. The active part made of the 4 cascode cells is implanted on a GaN-based wafer while the distributed passive part made of the interconnection lines is implanted on an AIN substrate. Finally, the GaN-based wafer integrating the active part is flip-chipped onto the AIN substrate via electrical and mechanical bumps. The flip-chip integrated circuit demonstrates a mean gain of 10dB and input/output matching lower than -10dB over the 4-18GHz bandwidth. At an input power of 29dBm (1db comp.), power simulations exhibit a mean output power of 37.6dBm with a standard deviation of 0.3dB, a power gain of 8.6dB and 16% of PAE over the band. At an input power of 31dBm (2dB comp.), the distributed amplifier achieves a mean output power of 38.6dBm, a power gain of 7.6dB and 18% of PAE.