SOI photonic technology for Defense and security

APIC (Advanced Photonics Integrated Circuits) Corporation is engaged in the research, development, and production of highly integrated photonic (HIP) and highly integrated photonic and electronic (HIPE) chip technology for a variety of defense and homeland security applications. This technology allows for significantly reduced chip size while also eliminating numerous pigtails and interconnects, thereby improving system reliability while reducing cost. NPIC's Mid-Pacific Photonics Prototyping Facility (M3PF) is a Navy-funded 6 '' and 8 '' silicon-on-insulator (SOI) photonic prototyping facility that was constructed specifically to meet this need. Among other high-tech equipment, M3PF is equipped with a high-resolution ASML QML stepper, a lithography tool that is capable of achieving 0.25 mu m resolution with a field size of 22 min by 32.5 mm. APIC is developing processing techniques for fiber-compatible core-size waveguides as well as for complementary metal-oxide semiconductor (CMOS)compatible core-size waveguides. In this paper, APIC's SOI photonic technology and M3PF capabilities will be described in detail. In addition, processed chips and their performance and applications will be discussed to demonstrate the efficacy of M3PF. APIC's additional processing capabilities-such as wafer bonding for heterogeneous integration processing, which plays a key role in HIPE chip implementation-will be described as well.