A simple compact model for long-channel junctionless Double Gate MOSFETs

被引:35
|
作者
Lime, Francois [1 ]
Santana, Ernesto [1 ]
Iniguez, Benjamin [1 ]
机构
[1] Univ Rovira & Virgili, ETSE DEEEA, Tarragona 43007, Spain
关键词
Compact model; DG MOSFET; Drain current; Junctionless; Long channel; TRANSISTORS;
D O I
10.1016/j.sse.2012.10.017
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a simple explicit compact model for the drain current of long channel symmetrical junctionless Double Gate MOSFETs. Our approach leads to very simple equations compared to other models, while retaining high accuracy and physical consistency. Explicit and analytical solutions are also given. Compared to TCAD simulations, the model gives excellent results in accumulation regime. Although the accuracy decreases in depletion regime for very high doping and semiconductor thicknesses, it still remains very good and it is shown that this issue can be neglected because if can only be seen on devices with both high doping and semiconductor thicknesses, that are unlikely to be used as a real device, because of their negative threshold voltage. Finally, it is shown that the model reproduces the two observed different conduction modes, related to accumulation and depletion regimes and that the effective gate capacitance and threshold voltage are different in those regimes, which explains the change of slope observed in the I-d(V-g) characteristics. (C) 2012 Elsevier Ltd. All rights reserved.
引用
收藏
页码:28 / 32
页数:5
相关论文
共 50 条
  • [31] A compact model of subthreshold characteristics for short channel double-gate junctionless field effect transistors
    Jin, Xiaoshi
    Liu, Xi
    Chuai, Rongyan
    Lee, Jung-Hee
    Lee, Jong-Ho
    EUROPEAN PHYSICAL JOURNAL-APPLIED PHYSICS, 2014, 65 (03):
  • [32] A complete and Verilog-A compatible Gate-All-Around long-channel junctionless MOSFET model implemented in CMOS inverters
    Moldovan, Oana
    Lime, Francois
    Iniguez, Benjamin
    MICROELECTRONICS JOURNAL, 2015, 46 (11) : 1069 - 1072
  • [33] Compact core model for Symmetric Double-Gate Junctionless Transistors
    Cerdeira, A.
    Avila, F.
    Iniguez, B.
    de Souza, M.
    Pavanello, M. A.
    Estrada, M.
    SOLID-STATE ELECTRONICS, 2014, 94 : 91 - 97
  • [34] Charge-based model for long-channel cylindrical surrounding-gate MOSFETs from intrinsic channel to heavily doped body
    Liu, Feng
    He, Jin
    Zhang, Lining
    Zhang, Jian
    Hu, Jinghua
    Ma, Chenyue
    Chan, Mansun
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (08) : 2187 - 2194
  • [35] A subthreshold current model for nanoscale short channel junctionless MOSFETs applicable to symmetric and asymmetric double-gate structure
    Jin, Xiaoshi
    Liu, Xi
    Kwon, Hyuck-In
    Lee, Jung-Hee
    Lee, Jong-Ho
    SOLID-STATE ELECTRONICS, 2013, 82 : 77 - 81
  • [36] A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs
    Chiang, Te-Kuang
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (09) : 2284 - 2289
  • [37] An analytical I-V model of SiC double-gate junctionless MOSFETs
    Li, Yi
    Zhou, Tao
    Guo, Zixuan
    Yang, Yuqiu
    Wu, Junyao
    Cai, Huan
    Wang, Jun
    Yin, Jungang
    Huang, Wenqing
    Zhang, Miao
    Hou, Nianxing
    Liu, Qin
    Deng, Linfeng
    MICROELECTRONICS JOURNAL, 2024, 154
  • [38] Analytical Threshold Voltage Model of Junctionless Double-Gate MOSFETs With Localized Charges
    Woo, Jong-Ho
    Choi, Ji-Min
    Choi, Yang-Kyu
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (09) : 2951 - 2955
  • [39] Continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs
    Oproglidis, T. A.
    Tsormpatzoglou, A.
    Tassis, D. H.
    Theodorou, C. G.
    Ghibaudo, G.
    Dimitriadis, C. A.
    SOLID-STATE ELECTRONICS, 2021, 175
  • [40] A review of special gate coupling effects in long-channel SOI MOSFETs with lightly doped ultra-thin bodies and their compact analytical modeling
    Rudenko, T.
    Nazarov, A.
    Kilchytska, V.
    Flandre, D.
    SOLID-STATE ELECTRONICS, 2016, 117 : 66 - 76