A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier

被引：6
|
作者：
Suh, Yunjae [1 ]
Lee, Jongmi [1 ]
Kim, Byungsub [1 ]
Park, Hong-June [1 ]
Sim, Jae-Yoon [1 ]
机构：
[1] Pohang Univ Sci & Technol, Dept Elect & Elect Engn, Pohang 790784, South Korea
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2013年 / 60卷 / 03期
基金：
新加坡国家研究基金会;
关键词：
Analog-to-digital converter (ADC); Gm-based amplifier; operational transconductance amplifier (OTA); pipelined ADC; semidigital amplifier; 50; MS/S; DESIGN;
D O I：
10.1109/TCSII.2013.2240832
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A semidigital Gm-based amplifier is proposed for a low-power pipelined analog-to-digital converter (ADC). The amplifier performs a class-AB operation by smoothly changing between a comparator-like semidigital driver and a continuous-time high-gain amplifier according to the input voltage difference. A 10-bit pipelined ADC with 2.5-bit/stage architecture is implemented in a 0.13-mu m CMOS. The ADC consumes 1.25 mW at a sampling rate of 25 MS/s and achieves a Nyquist-rate figure-of-merit of 139 and 232 fJ/c-s without and with power consumption from a resistor ladder, respectively.
引用
收藏
页码：142 / 146
页数：5
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