On-line fault tolerance for FPGA interconnect with roving STARs

We present fault tolerant (FT) techniques for programmable interconnect resources in FPGAs. In our approach. the system application in the FPGA is on-line and executing while test,figuration take place, We reuse faulty interconnect resources , diagnosis, and FT reconfiguration whenever possible to eliminate FT reconfiguration anti to reduce the use of spare interconnects, We present a new method for dealing with multiple interconnect faults, Our multi-staged, interconnect FT techniques have been successfully implemented on the ORCA 2CA series of FPGAs.