An integrated CDMA intermediate-frequency transceiver for wireless local loop

This Paper describes the design and implementation of a 10-MHz bandwidth WLL (Wireless Antenna Local Loop) intermediate frequency (IF) transceiver integrated circuit. The chip interfaces between the RF (radio frequency) and the digital MODEM sections, which performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. It incorporates two fixed frequency PLL's, low pass filters, A/D and D/A converters. It is implemented in a 0.6-mu m silicon CMOS process, The PLL's include the VCO's, dividers, phase detectors, charge pump circuits on chip. The only external components are the loop filter and the varactor-tuned tank circuit. Total supply currents are 40 mA and 50 mA for the RX and Tx modes, respectively, at 3.3 V.