Tunable FIR and IIR Fractional-Delay Filter Design and Structure Based on Complex Cepstrum

被引:9
|
作者
Pei, Soo-Chang [1 ]
Lin, Huei-Shan [2 ]
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Grad Inst Commun Engn, Taipei 10617, Taiwan
关键词
All-pass filter; complex cepstrum; Farrow structure; fractional-delay (FD) filter; linear-phase filter; tunable structure; MAXIMALLY FLAT; DIGITAL-FILTERS;
D O I
10.1109/TCSI.2009.2015212
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A cepstrum-based approach is proposed to design finite-and infinite-impulse-response (IIR) fractional-delay (FD) filters. The maximal-flatness criteria on frequency responses are formulated as a system of linear equations to solve the truncated complex cepstrum. The closed-form solutions to cepstrum sequences can be derived. Moreover, it is very attractive that the resultant cepstrum coefficients are directly proportional to the desired FD. Under a fixed filter order, the set of normalized complex cepstra needs to be computed once and stored, and the specific set for an arbitrary FD is obtained by simply multiplying the stored set with the delay value. According to this observation, we also design two kinds of tunable filter structures consisting of several linear-phase filters, in which it is more flexible to obtain better performance by adding the extra substructure without modifying the present one. Moreover, the tunable FD is simply controlled by a single parameter, and the usage of linear-phase filters saves half of the multipliers, largely reducing the cost of hardware implementation. In addition, we obtain an IIR all-pass filter with a wider useful band than that based on Thiran's design.
引用
收藏
页码:2195 / 2206
页数:12
相关论文
共 50 条
  • [41] Design of Fractional Delay FIR Filter Using Discrete Cosine Transform
    Tseng, Chien-Cheng
    Lee, Su-Ling
    2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 2008, : 858 - +
  • [42] Design of variable fractional delay fir filter using differentiator bank
    Tseng, CC
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV, PROCEEDINGS, 2002, : 421 - 424
  • [43] Design of Fractional Delay FIR Filter Using Radial Basis Function
    Tseng, Chien-Cheng
    Lee, Su-Ling
    ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 485 - +
  • [44] Bi-Minimax Design of Even-Order Variable Fractional-Delay FIR Digital Filters
    Deng, Tian-Bo
    Chivapreecha, Sorawat
    Dejhan, Kobchai
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (08) : 1766 - 1774
  • [45] Optimal design of variable fractional-delay digital filters
    Deng, TB
    ISSPA 2001: SIXTH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, VOLS 1 AND 2, PROCEEDINGS, 2001, : 25 - 28
  • [46] Weighted-least-squares design of variable fractional-delay FIR filters using coefficient symmetry
    Deng, Tian-Bo
    Lian, Yong
    IEEE TRANSACTIONS ON SIGNAL PROCESSING, 2006, 54 (08) : 3023 - 3038
  • [47] Design of FIR Fractional Delay Filter Based on Maximum Signal-to-Noise Ratio Criterion
    Tseng, Chien-Cheng
    Lee, Su-Ling
    2013 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA), 2013,
  • [48] Hybrid Structures for Low-Complexity Variable Fractional-Delay FIR Filters
    Deng, Tian-Bo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (04) : 897 - 910
  • [49] An IIR ALE based on constrained FIR filter
    Okello, J
    Ueda, K
    Itoh, Y
    Ochi, H
    2002 6TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, VOLS I AND II, 2002, : 281 - 284
  • [50] Optimal design of variable fractional-delay digital filters
    Deng, TB
    2001 IEEE WORKSHOP ON STATISTICAL SIGNAL PROCESSING PROCEEDINGS, 2001, : 353 - 356