A monolithic CMOS DC-DC converter

被引:0
|
作者
Li, Lei [1 ]
机构
[1] Beijing JiaoTong Univ, Dept Elect Engn, Beijing 100044, Peoples R China
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A monolithic current-mode pulsewidth-modulation (PWM) control CMOS DC-DC converter is introduced in this paper. The converter is composed of a power stage and a feedback network.And in the feedback network,a buffer with dead time is introduced to eliminate the short-circuit power dissipation of switching transistor. This design is presented in SMIC 0.18um Mixed-signal CMOS technology, The Hspice simulation results show that the output voltage is 1.8V, the conversion efficiency is 90.9%, the output ripple voltage is less than 5mV under 3.3V input voltage.
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页码:574 / 575
页数:2
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