Describing Methods for High-level Synthesis of Histogram Generation and Their Evaluation

To achieve high-performance and low-power simultaneously on an embedded image processing product, hardware implementation of high computational software processing is needed. The hardware development however is a large burden to the developer. High-level synthesis (HLS) automatically converting software into hardware can reduce the design burden significantly. To use HLS technology efficiently, software program must be described considering the hardware organization that HLS tool will generate. Histogram generation is one of the important primitives in image processing. In histogram generation, data dependency for reading and writing to the same address on the histogram hinders ideal pipelining by HLS tool. This paper shows a description method of histogram generation that can obtain more accurate results for existing software description method while HLS tool can achieve the ideal pipelining. Also, applying histogram generation using these methods to Otsu's automatic binarization, we clarify the effect of the proposed method in a real application.