共 50 条
- [21] A family of bidirectional systolic arrays for matrix-vector multiplication MODERN PROBLEMS OF RADIO ENGINEERING, TELECOMMUNICATIONS AND COMPUTER SCIENCE, PROCEEDINGS, 2002, : 90 - 92
- [23] A high-performance matrix–matrix multiplication methodology for CPU and GPU architectures The Journal of Supercomputing, 2016, 72 : 804 - 844
- [25] SYSTOLIC ALGORITHMS FOR MATRIX MULTIPLICATION ON SPACE OPTIMAL 1D SYSTOLIC ARRAYS FACTA UNIVERSITATIS-SERIES MATHEMATICS AND INFORMATICS, 2014, 29 (03): : 243 - 259
- [26] Sampled Dense Matrix Multiplication for High-Performance Machine Learning 2018 IEEE 25TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING (HIPC), 2018, : 32 - 41
- [27] Anatomy of High-Performance Many-Threaded Matrix Multiplication 2014 IEEE 28TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM, 2014,
- [28] A High-Performance Accelerator for Floating-Point Matrix Multiplication 2017 15TH IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS AND 2017 16TH IEEE INTERNATIONAL CONFERENCE ON UBIQUITOUS COMPUTING AND COMMUNICATIONS (ISPA/IUCC 2017), 2017, : 396 - 402
- [29] A high-performance matrix-matrix multiplication methodology for CPU and GPU architectures JOURNAL OF SUPERCOMPUTING, 2016, 72 (03): : 804 - 844