Anomalous interface degradation of a-Si:H TFTs during LCD lifetime

In this paper, we present some unpublished results for the first time, on an anomalous a-Si:H/SiNx interface degradation that is to a first order, independent of increasing temperature stress. This interface degradation produces significant impact on the linear region drain current and the ability to charge the pixel capacitance during the gate access time. This anomalous behavior can only be explained by an electric field coupled two carrier transport mechanism occurring at the two interfaces of the gate dielectric. The experimental and modeling results to be discussed in this paper clearly shows that if metastable defect creation is suspect of being present (possibly attributed to the TFT subthreshold slope degradation), then the far majority of the threshold voltage shift observed here is dominated by charge injection and transport in the gate insulator.