An efficient VLSI architecture for RSA public-key cryptosystem

被引：0
|
作者：
Chiang, JS [1 ]
Chen, JK [1 ]
机构：
[1] Tamkang Univ, Dept Elect Engn, Taipei, Taiwan
来源：
ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI | 1999年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, a new efficient VLSI architecture to compute RSA public-key cryptosystem is proposed. The modified II-algorithm is applied to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps reduced about 5n/18. For the modular multiplication the L-algorithm (LSB first) is used. In the architecture of the modular multiplication the iteration times are only half of Montgomery's algorithm and the H-algorithm. By these arrangements, this architecture of RSA has very good area-time product.
引用
收藏
页码：496 / 499
页数：4
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