Advantages of Embedded Decoupling Capacitance in High Speed Compact Board Design

被引：0
|
作者：
Fei, Yee Chang [1 ]
机构：
[1] UniMAP, Arau, Malaysia
来源：
PROCEEDINGS OF THE 14TH IEEE STUDENT CONFERENCE ON RESEARCH AND DEVELOPMENT (SCORED) | 2016年
关键词：
embedded capacitance; PCB; PDN; power integrity; signal integrity;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper provides an introduction about embedded capacitance technology and its implementation on printed circuit board (PCB). The advantages of implementing embedded decoupling capacitance in compact PCB with high speed signal transmission are also explained. The advantages in terms of power and signal integrity are discussed in detail by performing analysis in 2 phases. In phase one, the computation of power distribution network (PDN) impedance of the conventional PCB with discrete decoupling capacitors and the PCB with embedded decoupling capacitance is performed. Meanwhile in phase two, co-analysis of power and signal integrity (PI/SI) on test cases with decoupling conditions mentioned in phase one is conducted to observe the power rail noise and quality of signal transmission. The analysis results are further discussed in the later section of this paper.
引用
收藏
页数：5
相关论文
共 50 条
  • [1] Power-bus decoupling with embedded capacitance in printed circuit board design
    Xu, MJ
    Hubing, TH
    Chen, J
    Van Doren, TP
    Drewniak, JL
    DuBroff, RE
    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2003, 45 (01) : 22 - 30
  • [2] The Advantages of Substituting Decoupling Capacitors on PWB with Embedded Capacitance Technology
    Yee, Chang Fei
    2020 IEEE INTERNATIONAL RF AND MICROWAVE CONFERENCE (RFM), 2020,
  • [3] Simulation tools speed the design of embedded capacitance layers
    Oak-Mitsui Technologies
    不详
    不详
    Printed Circuit Des. Manuf., 2006, 12 (24-29):
  • [4] Design and Implementation of the Embedded Capacitance Layers for Decoupling of Wireless Sensor Nodes
    Zheng, Liqiang
    Mathewson, Alan
    O'Flynn, Brendan
    Hayes, Michael
    O'Mathuna, Cian
    2010 12TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2010, : 687 - 690
  • [5] Embedded decoupling capacitor performance in high speed circuits
    Wan, LX
    Raj, PM
    Balaraman, D
    Muthana, P
    Bhattacharya, SK
    Varadarajan, M
    Abothu, IR
    Swaminathan, M
    Tummala, R
    55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS, 2005, : 1617 - 1622
  • [6] A compact capacitance meter for high speed production test
    不详
    MICROWAVE JOURNAL, 2001, 44 (05) : 368 - +
  • [7] Advantages for embedding DC-link decoupling capacitance in high capacity power electronic converters
    Li, Guangzhuo
    Deng, Yan
    Ruan, Jie
    He, Xiangning
    2018 IEEE 19TH WORKSHOP ON CONTROL AND MODELING FOR POWER ELECTRONICS (COMPEL), 2018,
  • [8] An overview of the NCMS/StorageTek embedded decoupling capacitance project
    Bowles, PH
    Charbonneau, R
    INTERNATIONAL SYMPOSIUM ON ADVANCED PACKAGING MATERIALS: PROCESSES, PROPERTIES AND INTERFACES, PROCEEDINGS, 1999, : 191 - 196
  • [9] Compact MIMO Antenna with Embedded Decoupling Network
    Zhang, Xiu Yin
    Xue, Cheng-Dai
    Cao, Yunfei
    Ding, Chao-feng
    2017 IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL ELECTROMAGNETICS (ICCEM), 2017, : 64 - 66
  • [10] High-speed board design necessitates new design
    George, P
    ELECTRONIC DESIGN, 1997, : 61 - 61
12345