Channel Analysis of High Speed Digital Module and Correlation between Simulations and Measurements

In this paper, Signal integrity (SI) analysis is used to analyze effect of crosstalk on performance of a High Speed Digital Module: its most critical part is simulated by ADS, a simulation tool, and then it is measured by an oscilloscope to verify the correctness of results. Technology trends toward higher speed and device density have increased complexity of PCB design to support fast varying and broadband signals without degrading the SI to unacceptable levels. The SI analysis relies on time-domain simulation of pseudo-random data patterns with at rates about 1 Gb/s. The models, like IBIS and SPICE, are required to describe the electrical behavior of the integrated components involved at interconnect traces. This paper is focused on crosstalk, which is one of the main issues of concern for SI. The final result validation is important to define the limitation of simulation for the pre- and post-layouts of electronic board and to reduce the design risk.