Design assistant approach to analogue layout generation

The authors describe a novel analogue layout design assistant ALDA built around an industry-standard commercial CAD framework (CADENCE). The framework is used for the management of the design data and to provide access to low-level tools for tasks such as routing and compaction. This approach enables effort to be concentrated on the control of these tools and on addressing the specific issues and problems related to analogue layout. The approach adopted in ALDA involves a floorplanning phase, followed by a detailed physical assemby phase. The floorplan is hierarchical and is driven by constraints specified by the user; the placement within each hierarchical group is based on an objective function reflecting both interconnect efficiency and silicon usage. Physical assembly is carried out in a nested, bottom-up, sequence of place-route-compact operations, following the hierarchical floorplan structure. ALDA achieves this by defining a placement in the framework's layout database and then controlling the framework's router and compactor to generate the detailed layout of each group in the hierarchy. ALDA's operation is illustrated with the design of a 61 component CMOS op-amp, which is representative of a typical industrial design.