A New Difference Method for Side-Channel Analysis with High-Dimensional Leakage Models

被引:0
|
作者
Heuser, Annelie [1 ,4 ]
Kasper, Michael [2 ,4 ]
Schindler, Werner [3 ,4 ]
Stoettinger, Marc [1 ,4 ]
机构
[1] Tech Univ Darmstadt, Darmstadt, Germany
[2] Fraunhofer Inst, Secure Informat Technol, Munich, Germany
[3] BSI, Bonn, Germany
[4] Ctr Adv Security Res Darmstadt, Darmstadt, Germany
来源
关键词
Side-Channel Analysis; Stochastic Approach; Environmental Influences; Drifting Offset; High-dimensional Leakage Models;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The goal of the DPA contest v2 (2009 - 2010) was to find the most efficient side-channel attack against a particular unprotected AES-128 hardware implementation. In this paper we discuss two problems of general importance that affect the success rate of profiling based attacks, and we provide effective solutions. First, we consider the impact of temperature variations on the power consumption, which causes a so-called drifting offset. To cope with this problem we introduce a new method called Offset Tolerant Method (OTM) and adjust OTM to the stochastic approach (SA-OTM). The second important issue of this paper concerns the choice of an appropriate leakage model as this determines the success rate of SA and SA-OTM. Experiments with high-dimensional leakage models show that the overall leakage is not only caused by independent transitions of bit lines. Compared to the formely best submitted attack of the DPA contest v2 the combination of SA-OTM with high-dimensional leakage models reduces the required number of power traces to 50%.
引用
收藏
页码:365 / +
页数:3
相关论文
共 50 条
  • [21] Achieving side-channel high-order correlation immunity with leakage squeezing
    Carlet, Claude
    Danger, Jean-Luc
    Guilley, Sylvain
    Maghrebi, Houssem
    Prouff, Emmanuel
    JOURNAL OF CRYPTOGRAPHIC ENGINEERING, 2014, 4 (02) : 107 - 121
  • [22] How to explain side-channel leakage to your kids
    Naccache, D
    Tunstall, M
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS-CHES 2000, PROCEEDINGS, 2001, 1965 : 229 - 230
  • [23] An exploration of effective fuzzing for side-channel cache leakage
    Basu, Tiyash
    Aggarwal, Kartik
    Wang, Chundong
    Chattopadhyay, Sudipta
    SOFTWARE TESTING VERIFICATION & RELIABILITY, 2020, 30 (01):
  • [24] Imitating Functional Operations for Mitigating Side-Channel Leakage
    Dhavlle, Abhijitt
    Rafatirad, Setareh
    Khasawneh, Khaled
    Homayoun, Houman
    Dinakarrao, Sai Manoj Pudukotai
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (04) : 868 - 881
  • [25] Side-channel leakage models for RISC instruction set architectures from empirical data
    Seuschek, Hermann
    Rass, Stefan
    MICROPROCESSORS AND MICROSYSTEMS, 2016, 47 : 74 - 81
  • [26] Side-Channel Leakage Models for RISC Instruction Set Architectures from Empirical Data
    Seuschek, Hermann
    Rass, Stefan
    2015 EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD), 2015, : 423 - 430
  • [27] Killing EM Side-Channel Leakage at its Source
    Das, Debayan
    Nath, Mayukh
    Ghosh, Santosh
    Sen, Shreyas
    2020 IEEE 63RD INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2020, : 1108 - 1111
  • [28] First-Order Side-Channel Leakage Analysis of Masked but Asynchronous AES
    Bouvet, Antoine
    Guilley, Sylvain
    Vlasak, Lukas
    SECURITY AND PRIVACY, ICSP 2021, 2021, 1497 : 16 - 29
  • [29] Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis
    Kiaei, Pantea
    Yao, Yuan
    Liu, Zhenyuan
    Fern, Nicole
    Breunesse, Cees-Bart
    Van Woudenberg, Jasper
    Gillis, Kate
    Dich, Alex
    Grossmann, Peter
    Schaumont, Patrick
    IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2024, 12 (02) : 496 - 507
  • [30] Side-Channel Analysis of Keymill
    Dobraunig, Christoph
    Eichlseder, Maria
    Korak, Thomas
    Mendel, Florian
    CONSTRUCTIVE SIDE-CHANNEL ANALYSIS AND SECURE DESIGN, 2017, 10348 : 138 - 152