Development of a White Rabbit Interface for Synchronous Data Acquisition and Timing Control

被引：0

作者：

Pan, Weibin ^{[1
]}

Du, Qiang ^{[1
]}

Gong, Guanghua ^{[1
]}

机构：

[1] Tsinghua Univ, Key Lab Particle & Radiat Imaging, Dept Engn Phys, Beijing 100084, Peoples R China

来源：

2012 18TH IEEE-NPSS REAL TIME CONFERENCE (RT) | 2012年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Sub-nanosecond precision timing distribution and control are key techniques in various distributed real-time applications, where the proposed White Rabbit (WR) project provides a solution combining both data transmission and timing control via the same media. This paper demonstrates the design and development of a compact, standalone WR node following FPGA Mezzanine Card (FMC) standard, which would work as a common WR interface to different applications. Test results show that the timestamp synchronization precision of 65ps (RMS) has been observed between the node and a WR switch, and the data throughput of over 0.3Gbps has been verified in a preliminary test between the node and a PC host.

引用

页数：3

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