Reliability Investigation with Accelerated Body Diode Current Stress for 3.3 kV 4H-SiC MOSFETs with Various Buffer Epilayer Thickness

被引：0

作者：

Ebiike, Yuji ^{[1
]}

Murakami, Takeshi ^{[1
]}

Suekawa, Eisuke ^{[1
]}

Yamamoto, Shigehisa ^{[1
]}

Sumitani, Hiroaki ^{[1
]}

Imaizumi, Masayuki ^{[1
]}

Tarutani, Masayoshi ^{[1
]}

机构：

[1] Mitsubishi Electr Corp, Power Device Works, 1-1-1 Imajukuhigashi Nishi Ku, Fukuoka, Fukuoka 8190192, Japan

来源：

PRODCEEDINGS OF THE 2018 IEEE 30TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD) | 2018年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

3.3 kV 4H-SiC MOSFETs with various buffer layer thickness has been fabricated in order to investigate the bipolar degradation associated with the expansion of stacking faults (SFs). The body diode stress tests under DC current of 240 A/cm(2) were performed at 200 degrees C. Shifts in specific on-resistance (R-on,R-sp) and forward voltage (V-f) of body diode were markedly reduced for the MOSFETs with thick buffer layer of 30 mu m This result indicates that the body diode reliability may be improved by suitably designed buffer layer. The photoluminescence (PL) image of these SiC epilayer after the stress tests revealed the SF expansion due to the bipolar current stress was suppressed by the thick buffer layer.

引用

页码：447 / 450

页数：4

共 49 条

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