A 0.9-3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

被引：5
|
作者：
Sapawi, Rohana [1 ,2 ]
Pokharel, Ramesh K. [3 ]
Mat, Dayang Azra Awang [1 ]
Kanaya, Haruchi [1 ]
Yoshida, Keiji [1 ]
机构：
[1] Kyushu Univ, Grad Sch ISEE, Fukuoka 8190395, Japan
[2] Univ Malaysia Sarawak, Fac Engn, Dept Elect, Kota Samarahan 94300, Sarawak, Malaysia
[3] Kyushu Univ, E Just Ctr, Fukuoka 8190395, Japan
来源：
MICROWAVE AND OPTICAL TECHNOLOGY LETTERS | 2012年 / 54卷 / 12期
关键词：
linearity; power amplifier; stagger tuning technique; power added efficiency;
D O I：
10.1002/mop.27212
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A simple CMOS broadband power amplifier design with high linearity and good efficiency is proposed.The proposed power amplifier design employed stagger tuning technique that consist of two stages amplifier with different resonant frequencies to obtain a wider bandwidth from 0.9 to 3.5 GHz and low power consumption. To obtain high linearity self-biased circuit is employed at the first stage of amplifier. The measurement results indicated that the proposed design achieves average gain of 8.5 dB, an input return loss (S11) less than -3 dB and output return loss (S22) less than -5 dB. High linearity, that is, IIP3 of 13.4 dBm at 2 GHz, power added efficiency of 34% is obtained while consuming 24.4 mW power from 1.5 V supply voltage. (c) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2881:2884, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27212
引用
收藏
页码：2881 / 2884
页数：4
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