A Distributed Bulk-Oxide Trap Model for Al2O3 InGaAs MOS Devices

被引：130

作者：

Yuan, Yu ^{[1
]}

Yu, Bo ^{[1
]}

Ahn, Jaesoo ^{[2
]}

McIntyre, Paul C. ^{[1
,2
]}

Asbeck, Peter M.

Rodwell, Mark J. W. ^{[3
]}

Taur, Yuan ^{[1
]}

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

[2] Stanford Univ, Dept Mat Sci & Engn, Stanford, CA 94305 USA

[3] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2012年 / 59卷 / 08期

关键词：

Bulk-oxide trap; III-V; MOS; tunneling;

D O I：

10.1109/TED.2012.2197000

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a distributed circuit model for bulk-oxide traps based on tunneling between the semiconductor surface and trap states in the gate dielectric film. The model is analytically solved at dc. It is shown that the distributed bulk-oxide trap model correctly depicts the frequency dispersion in the capacitance-and conductance-voltage data of Al2O3-InGaAs MOS devices that do not fit the conventional interface state model. The slope degradation or stretch-out of the measured capacitance-voltage curve near flatband can be also explained by the distributed bulk-oxide trap model.

引用

页码：2100 / 2106

页数：7

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