CMOS class-AB voltage-mode multiplier

被引：0
|
作者：
Boonchu, B [1 ]
Surakampontom, W [1 ]
机构：
[1] Kings Mongkut Inst Technol, Fac Engn, Bangkok, Thailand
来源：
International Symposium on Communications and Information Technologies 2005, Vols 1 and 2, Proceedings | 2005年
关键词：
multiplier; class-AB;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A novel circuit configuration for a CMOS voltage-mode four-quadrant analog multiplier is described. It is based on square law characteristic of MOS transistor and class-AB amplifier. The multiplier achieves a linearity of 1.1%, -3dB bandwidth of 35MHz, and a total harmonic distortion of 0.76 %. The power consumption is 1.5mW.
引用
收藏
页码：1489 / 1492
页数：4
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