Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs

被引：8
|
作者：
Purwar, Vaibhav [1 ]
Gupta, Rajeev [1 ]
Kumar, Nitish [2 ]
Awasthi, Himanshi [2 ]
Dixit, Vijay Kumar [1 ]
Singh, Kunal [3 ]
Dubey, Sarvesh [4 ]
Tiwari, Pramod Kumar [5 ]
机构：
[1] Rajasthan Tech Univ, Dept Elect Engn, Kota 324010, India
[2] Kanpur Inst Technol, Dept Elect & Commun Engn, Kanpur 208001, Uttar Pradesh, India
[3] Natl Inst Technol, Dept Elect & Commun Engn, Jamshedpur, Bihar, India
[4] BRA Bihar Univ Muzaffarpur, LND Coll Motihari, Dept Phys, Muzaffarpur 845401, Bihar, India
[5] Indian Inst Technol Patna, Dept Elect Engn, Patna, Bihar, India
来源：
APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING | 2020年 / 126卷 / 09期
关键词：
Dielectric pocket; Double gate-all-around; High temperature; Linearity; Harmonic distortion; Analog; RF performance; SHALLOW EXTENSION SILICON; NOTHING ISESON MOSFET; DRAIN CURRENT MODEL; RF LINEARITY; OPTIMIZATION; TRANSISTOR;
D O I：
10.1007/s00339-020-03929-0
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
The present paper is about using three popular performance boosters in a device to battle with deterioration in device characteristics imposed by temperature variation. The dielectric pocket (DP) technology has been utilized in double gate-all-around MOSFET to limit the leakage current problem. Further, high-K dielectric as gate oxide is employed so that ON-state current may be improved with enhanced device scalability. The boosted immunity towards short-channel effects (SCEs) and improvement in the device's analog performance is demonstrated through comparison between dielectric pocket high-K double Gate-All-Around (DP-DGAA) and double Gate-All-Around (DGAA) MOSFETs with temperature variation from 300 to 500 K by using commercially available ATLAS, a three-dimensional (3D) device simulator from SILVACO.
引用
收藏
页数：8
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