A vertical Hall device in cmos high-voltage technology

被引：0

作者：

Schurig, E ^{[1
]}

Demierre, A ^{[1
]}

Schott, C ^{[1
]}

Popovic, RS ^{[1
]}

机构：

[1] Ecole Polytech Fed Lausanne, DMT, IMS, CH-1015 Lausanne, Switzerland

来源：

TRANSDUCERS '01: EUROSENSORS XV, DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2 | 2001年

关键词：

vertical Hall; CMOS;

D O I：

暂无

中图分类号：

R318 [生物医学工程];

学科分类号：

0831 ;

摘要：

In this paper we demonstrate for the first time, how vertical Hall devices manufactured in CMOS technology attain sensitivities comparable to those of conventional silicon plate-shape devices without any additional etching step. This was achieved by taking advantage of the low doping levels of a high-voltage technology. An additional unconventional doping reduction method can further improve the sensitivity. The current related sensitivity of the presented devices varies from 18 V/AT up to 127 V/AT for different sensor geometry and doping concentrations. The linearity error is less than 0.04% for magnetic fields up to 2T.

引用

页码：140 / 143

页数：4

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