Elimination of metal bridging failure in VLSI metallization and yield enhancement of FLAT ROM device

被引：0
|
作者：
Hua, YN [1 ]
机构：
[1] Chartered Semicond Mfg Ltd, Singapore 118222, Singapore
来源：
ICSE'98: 1998 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS | 1998年
关键词：
D O I：
10.1109/SMELEC.1998.781142
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A few Lots of wafers (FLAT ROM) were reported with low yield (5-20%) issue. RIE, SEM & EDX techniques were used to identify the root causes. Al metal filaments were found at particular locations, which had resulted in metal bridging failure. They were concluded to be due to the narrow space between the two polys & insufficient metal etching. The solution to eliminate metal filament is to increase over etch of L90 from 100 to 135 or change the space between the two polys. After using new over etch recipe (135), the sort yield of wafer has been greatly enhanced.
引用
收藏
页码：17 / 19
页数：3
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